Computer systems are known where execution of an instruction is predicated on some value identified or addressed in the instruction. According to one proposal, a multibit test code is defined in each instruction, the multibit test code indicating a certain test conditionally cut is checked against a condition code held in the computer system and set by an earlier instruction. If the condition defined in the test code is satisfied by the condition code, the instruction is executed. If it is not, then the instruction is not executed.
In that arrangement, the number of test conditions which can be identified is restricted by the available length of the address field addressing the test register in the instruction. More test conditions can be defined, but at the expense of using up more bits in t he instruction.